1. Field of the Invention
The present invention relates to a semiconductor device and a test method thereof. More particularly, the present invention relates to a semiconductor device including a first management area and a second management area which provide tests of the semiconductor device.
Priority is claimed on Japanese Patent Application First Publication, No. 2010-025335, filed Feb. 8, 2010, the content of which is incorporated herein by reference.
2. Description of the Related Art
In general, a semiconductor device such as a non-volatile memory (e.g., a NAND type flash memory) includes a plurality of storage blocks for storing data. Among the plurality of storage blocks, abnormal storage blocks exist due to manufacturing failures and the like. The abnormal storage blocks are called bad blocks and are permissible at a predetermined rate or less. Japanese Patent Application First Publication, No. 2006-331611 describes a technique regarding a semiconductor device including a management area for managing positions (addresses) and the like of the bad blocks.